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Some seemingly regular events are so massive in their implications across various domains that they deserve their own write-up. TSMC’s highly unusual public complaint of ASML’s latest EUV pricing falls in that category.
Not only because the “very very expensive” complainer is relentless in utilizing its own pricing power, but also because it is not usual for these institutions to wash their dirty linen in public.
We had discussed the near-monopsony and near-monopoly clash one sees in the TSMC and ASML battle first in 2024. Time to refresh in more detail as we traverse through Elon Musk’s Terafab, Japan’s Rapidus, Samsung’s strike, and a few other topics, while first discussing whether ASML’s famed equipments are sufficient when one is thinking about a fab, aka whether a fab can be built by anyone with enough cash, and then whether they are necessary.
The premise sounds rhetorical, almost juvenile. Of course a fab is more than an ASML machine. But the version of this question worth asking is sharper. Every semiconductor fab in the world is a collection of equipment whose suppliers are well-known and, China aside, accessible to any major economy or tech oligarch with the cash to pay.
So can someone with enough will and enough budget build a leading-edge fab from a standing start?
Walk through what a leading-edge capital expenditure actually buys. You get EUV scanners from ASML. You get deposition and etch tools from Lam Research, Applied Materials, and Tokyo Electron. You fold in metrology and materials from KLA, Shin-Etsu, Lasertec, BESI, and Teradyne. The tools are astronomically expensive, but the catalog is wide open.
Yet, this open catalog raises a glaring paradox: Why would TSMC, currently benefiting from an unprecedented global supply crunch, use plans to defer its latest fab development as a negotiating tool against its suppliers?
The lesson the catalog does not teach is that the equipment, even when assembled in a multi-billion Dollar clean room, is the easy part. The hard part is everywhere. Most of those problems are not solved by buying a tool.
Each is solved by tens of thousands of correction loops, accumulated over decades, written in process documents that no single engineer carries in their head and no rival can copy by hiring twenty defectors. The table below covers some of the more devilish operating challenges that even with the best equipment up and running.
The above list is a small sample collection of the things that go into making a successful fab operation. In fact, what goes into making a cutting-edge fab is as describable as writing an essay on what makes a great artist with common pestles in her hand. It is the art part that makes TSMC wield its pricing power against everyone around it, including the supposed 100% market-share supplier like ASML.
However, there is another point out here, particularly in light of the high-sounding plans of some of the newer players from around the globe.
Regardless of what we say above, there is a rising horde of entities that want to embark on building semiconductor manufacturing facilities, including some at the most advanced end. We may try to claim that the cutting edge is impossible for anyone without experience, but not everyone believes in it.
Musk is certainly one of them. Everything about Terafab defies conventional logic. The initial budget is massive, but plausible at around US$25 billion. While the project will have Intel as a partner, one must remember the lack of experience and no working chip team.
The target of a terawatt of compute requires over 20m Rubin-class wafers and over 15m HBM4E wafers, apart from a lot of other things. At realistic yields and cycle times, that is more than the capacity of a few hundred of the best current fabs. The spread between announcement and physics is two orders of magnitude.
A more grounded, yet incredibly risky, plan is unfolding in Japan. Rapidus, founded in 2022, has backing from eight Japanese conglomerates and the government, as well as technology transferred from IBM. Cumulative public funding has reached roughly $15 billion.
Mass production is targeted for 2027, starting at 6,000 wafers per month and scaling to 30,000 later. For comparison, TSMC produces over 150,000 at leading nodes. There is no way to say whether Rapidus will succeed in these goals, but some experts see the possibility of competitive operations in single digits even by 2030.
China is the third experiment, the forced one. Sanctions block EUV. SMIC has nonetheless built a 7nm-class node using DUV multi-patterning, and Huawei’s Kirin 9030 sits between 7nm and 5nm. The engineering is genuine. So is the cost. SMIC’s 7nm yield is estimated at 20-40% against TSMC’s ~80% at the same node. The 5nm-class yield is reportedly under 20%. Per-chip cost runs roughly 50% above TSMC’s EUV-based equivalent.
The pattern across three live experiments is the same, supplemented by a half a dozen other announcements from Saudi Arabia, India, to Germany and other places in Europe. Money buys the equipment, and possibly the people. What it cannot buy is the experience that is critical in mastering the tiny steps. The instruments are sold from a catalog. The art is not.
The cleanest way to test the “money plus engineering equals fab” thesis is to walk through the graveyard of those who tried. The list of entities that failed to crack the leading edge of semiconductor manufacturing reads like a tech hall of fame: IBM, Motorola, Texas Instruments, and a litany of once-dominant Japanese conglomerates.
None of these titans lacked capital. None lacked brilliant engineers. Each had access to the exact same equipment catalog as TSMC, often years earlier. What they lacked was the institutional art. Money buys the instruments; it does not buy the instinct.
